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STRUCTURE PRODUCT SERIES TYPE FUNCTION
Silicon monolithic integrated circuits Bipolar stepping motor driver
BD63872EFV
PWM constant current controllable two H bridge driver Parallel-IN control Full, Half, and Quarter step modes Mix decay control
Absolute maximum ratings(Ta=25) Item Supply voltage
Limit Unit -0.2+36.0 V 1 W 1.45 Power dissipation Pd 4.702 W Input voltage for control pin VIN -0.2+5.5 V RNF maximum voltage VRNF 0.7 V Maximum output current IOUT 1.03 A/phase Maximum output current(peak)4 IOUTPEAK 1.53 A/phase Operating temperature range Topr -25+85 Storage temperature range Tstg -55+150 Junction temperature Tjmax +150 1 70mmx70mmx1.6mm glass epoxy board. Derating in done at 11.6mW/ for operating above Ta=25. 2 4-layer recommended board. Derating in done at 37.6mW/ for operating above Ta=25. 3 Do not, however exceed Pd, ASO and Tjmax=150. 4 Pulse width tw1ms, duty 20%.
Symbol VCC1,2
Recommended operating conditions (Ta=-25+85) Item Symbol Min. Supply voltage VCC1,2 19 Output current IOUT 5 Do not, however exceed Pd, ASO. This product isn't designed for protection against radioactive rays.
Typ. 24 0.5
Max. 28 0.75
Unit V A/phase
Status of this document The Japanese version of this document is the formal specification. A customer may use this translation version only for a reference to help reading the formal version. If there are any differences in translation version of this document, formal version takes priority.
Rev. A
2/4
Electrical characteristics (Unless otherwise specified, Ta=25, VCC1,2=24V) Limit Item Symbol Min. Typ. Max. Whole Circuit current at standby ICCST 1.0 2.5 Circuit current ICC 2.5 5.0 Control input (PHASE1, I01, I11, PHASE2, I02, I12, PS) H level input voltage VINH 2.0 L level input voltage VINL 0.8 H level input current IINH 35 50 100 L level input current IINL -10 0 Output (OUT1A, OUT1B, OUT2A, OUT2B) Output ON resistance Output leak current Current control RNFXS input current RNFX input current VREF input current VREF input voltage range MTH input current MTH input voltage range Comparator threshold 100% Comparator threshold 67% Comparator threshold 33% Minimum on time (Blank time) RON ILEAK IRNFS IRNF IVREF VREF IMTH VMTH VCTH100 VCTH67 VCTH33 tONMIN -2.0 -40 -2.0 0 -2.0 0 0.57 0.38 0.18 0.3 1.90 -0.1 -20 -0.1 -0.1 0.60 0.40 0.20 0.8 2.47 10 3.0 3.5 0.63 0.42 0.22 1.5
Unit
Conditions
mA mA V V A A
PS=L PS=H, VREF=3V
VIN=5V VIN=0V IOUT=0.5A, Sum of upper and lower
A A A A V A V V V V s
RNFXS=0V RNFX=0V VREF=0V MTH=0V VREF=3V, (I0X,I1X)=(L,L) VREF=3V, (I0X,I1X)=(H,L) VREF=3V, (I0X,I1X)=(L,H) C=1000pF, R=39k
Rev. A
3/4 Package outline Product No.
BD63872EFV
Lot No.
HTSSOP-B28 (Unit:mm)
Block diagram
Pin No. / Pin name Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 Pin name GND OUT1B RNF1 RNF1S OUT1A NC VCC1 NC GND CR NC MTH VREF PS Pin No. 15 16 17 18 19 20 21 22 23 24 25 26 27 28 Pin name PHASE1 I01 I11 PHASE2 I02 I12 NC VCC2 NC OUT2A RNF2S RNF2 OUT2B NC
PHASE1 15 PHASE2 18 I01 16 I11 17 I02 19 I12 20 VREF 13

Regulator
9 GND 14 PS
UVLO OVLO TSD 2bit DAC OCP
7 VCC1
RNF1S
5 OUT1A 2 OUT1B
3 RNF1
Control logic
RNF2S
Predriver
Blank time PWM control CR 10 OSC Mix decay control
4 RNF1S 22 VCC2 24 OUT2A 27 OUT2B 26 RNF2 25 RNF2S 1 GND
NC : Non Connection
MTH 12
Rev. A
4/4 Operation Notes (1) Absolute maximum ratings An excess in the absolute maximum ratings, such as supply voltage, temperature range of operating conditions, etc., can break down the devices, thus making impossible to identify breaking mode, such as a short circuit or an open circuit. If any over rated values will expect to exceed the absolute maximum ratings, consider adding circuit protection devices, such as fuses. (2) Power supply lines As return of current regenerated by back EMF of motor happens, take steps such as putting capacitor between power supply and GND as an electric pathway for the regenerated current. Be sure that there is no problem with each property such as emptied capacity at lower temperature regarding electrolytic capacitor to decide capacity value. If the connected power supply does not have sufficient current absorption capacity, regenerative current will cause the voltage on the power supply line to rise, which combined with the product and its peripheral circuitry may exceed the absolute maximum ratings. It is recommended to implement a physical safety measure such as the insertion of a voltage clamp diode between the power supply and GND pins. (3) GND potential The potential of GND pin must be minimum potential in all operating conditions. (4) Metal on the backside (Define the side where product markings are printed as front) The metal on the backside is shorted with the backside of IC chip therefore it should be connected to GND. Be aware that there is a possibility of malfunction or destruction if it is shorted with any potential other than GND. (5) Thermal design Use a thermal design that allows for a sufficient margin in light of the power dissipation (Pd) in actual operating conditions. This IC exposes its frame of the backside of package. Note that this part is assumed to use after providing heat dissipation treatment to improve heat dissipation efficiency . Try to occupy as wide as possible with heat dissipation pattern not only on the board surface but also the backside. (6) Actions in strong electromagnetic field Use caution when using the IC in the presence of a strong electromagnetic field as doing so may cause the IC to malfunction. (7) ASO When using the IC, set the output transistor so that it does not exceed absolute maximum ratings or ASO. (8) Thermal shutdown circuit The IC has a built-in thermal shutdown circuit (TSD circuit). If the chip temperature becomes Tjmax=150, and higher, coil output to the motor will be open. The TSD circuit is designed only to shut the IC off to prevent runaway thermal operation. It is not designed to protect or indemnify peripheral equipment. Do not use the TSD function to protect peripheral equipment. (9) Ground Wiring Pattern When using both large current and small signal GND patterns, it is recommended to isolate the two ground patterns, placing a single ground point at the ground potential of application so that the pattern wiring resistance and voltage variations caused by large currents do not cause variations in the small signal ground voltage. Be careful not to change the GND wiring pattern of any external components, either.
Rev. A
Appendix
Notes
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Appendix1-Rev3.0

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